Transcript summary below.

Akash's Background

Akash grew up in Pittsburgh, PA near CMU, studied electrical engineering at Princeton with minors in physics and CS, and later pursued a PhD at Stanford. He originally had broad interests including physics, security, privacy, and reverse engineering, but became drawn to semiconductors because he wanted to work on problems with more lasting impact than the “cat-and-mouse” nature of security.

At Stanford, he worked with Professor Priyanka Raina as her first graduate student. His PhD explored unconventional computing and chip-design technologies, including reconfigurable architectures, nanoelectromechanical (NEM) relays, and resistive RAM. He completed three tapeouts: one with SkyWater to help bring up their resistive RAM process, and two with TSMC. His favorite project was a multiple-bits-per-cell resistive RAM chip where he handled much of the end-to-end process, including digital specification, verification testbenches, physical design, signoff, and even PCB design using KiCad.

A major theme of the interview is Akash’s belief in becoming a “full-stack chip designer.” He argues that experiencing the entire process—from architecture and RTL through physical design, tapeout, and board bring-up—makes engineers better because they can then understand how decisions at one layer affect the rest of the stack.

The conversation shifts to how Akash moved from chip research into EDA. During his PhD, he noticed many inefficiencies in hardware design workflows compared with software. Internships at NVIDIA and Synopsys deepened his interest in EDA: at NVIDIA, he worked on internal EDA methodology, and at Synopsys, he worked on AI-for-EDA tools including DSO.ai, producing a conference publication and patent. These experiences convinced him there was room to build faster, more user-friendly tools for chip designers.

Silimate's Origin Story

Akash co-founded the company with Ann Wu after taking Stanford’s Startup Garage class. They spent the course interviewing users rather than immediately building, trying to understand the highest-value problems in chip design. The company was accepted into Y Combinator while Akash was still completing his PhD, leading to a hectic period where he paused startup work, finished his dissertation, defended, and then drove directly from his PhD defense to the YC retreat.

Silimate's Products

Silimate’s product is described as a copilot for chip designers, focused on finding and fixing functional and PPA issues before synthesis. Its PPA-oriented tool, Preqorsor, provides early estimates of power, performance, and area, highlighting bottlenecks such as where a designer might add a pipeline stage or optimize logic. The goal is not to exactly replace synthesis reports, but to provide much faster feedback, especially on smaller RTL blocks, where results can arrive nearly instantly. Akash says the company targets large speedups and can integrate into both interactive copilot workflows and CI flows.

The interview also covers how Silimate uses AI and machine learning. Preqorsor relies more on traditional ML for PPA prediction, while LLMs are especially useful for optimization + functional correctness because they can reason across written specs, RTL, and testbenches. Akash emphasizes that LLMs are valuable because hardware specs are often incomplete or ambiguous; even when the model is wrong, surfacing hidden assumptions can help human designers debug and clarify intent.

On Building Silimate

On the business side, Akash says the company has 10+ customers, including Tenstorrent, and has seen “aha moments” where engineers used the tool to quickly identify where to optimize their design. He also discusses the difficulty of selling to risk-averse chip companies, especially around IP protection and infrastructure. Silimate handles this by making evaluations easy, sometimes even providing hardware/server infrastructure so customers can try the product safely before deciding on long-term deployment.

Akash also talks about hiring. Silimate looks for founding engineers who combine strong software skills with an interest or background in chip design. He values first-principles thinkers who can build simple solutions, reason scientifically, and care deeply about the chip-design problem rather than being interested in AI only for its own sake.

Silimate's Long-Term Vision

The closing section focuses on the future of AI in hardware design. Akash believes AI will touch every layer of the chip-design stack, but he is especially excited about front-end design and the long-term goal of going from spec to RTL. His vision is a feedback loop where written specifications, RTL, and verification collateral stay synchronized, allowing AI to generate, check, and revise design artifacts while humans validate key decisions. He argues this could reduce chip-design cycles from 12–16 months to one or two months, lowering non-recurring engineering costs and enabling many more companies to build specialized chips.